Part Number Hot Search : 
34M00 NDP610BE RMD04 BPC350 LN15XB60 12864 BU2520D SZ5248
Product Description
Full Text Search
 

To Download ALT6705 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  al t6705 ALT6705 help4 tm umts800 (bands 5, 6, 18, 19, & 26 ) lte, wcdma, cdma multimode pam data sheet - rev 2.5 m45 package 10 pin 3 mm x 3 mm x 1 mm surface mount module figure 1: block diagram features ? multimode (lte, hspa, ev-do compliant) ? 4th generation help tm technology ? high effciency (r99 waveform): ? 40 % @ p out = +28.4 dbm ? 27 % @ p out = +17 dbm ? 18 % @ p out = +13.5 dbm ? 20 % @ p out = +8 dbm ? 11 % @ p out = +3.5 dbm ? low quiescent current: 3 ma ? low leakage current in shutdown mode: <5 a ? internal voltage regulator ? integrated daisy chainable directional coupler with cpl in and cpl out port ? internal dc blocks on all rf ports ? optimized for a 50 ? system ? 1.8v control logic ? rohs compliant package, 260 o c msl-3 applications ? bands 5, 6, 18, 19, & 26 lte wireless devices ? bands 5, 6, 18, 19, & 26 wcdma/hspa wireless devices ? band class 0 cdma/evdo wireless devices product description the ALT6705 help4 tm pa is the 4th generation help tm product for lte and wcdma devices operating in umts800 (bands 5, 6, 18,19, & 26) and for cdma devices operating in cell-band. this pa incorporates anadigics help4 tm technology to deliver exceptional efficiency at low power levels and low quiescent current without the need for external voltage regulators or converters. the device is manufactured using advanced ingap- plus tm hbt technology offering state-of-the-art reliability, temperature stability, and ruggedness. three selectable bias modes that optimize effciency for different output power levels and a shutdown mode with low leakage current increase handset talk and standby time. a daisy chainable directional coupler is integrated in the module thus eliminating the need of an external coupler. the self-contained 3 mm x 3 mm x 1 mm surface mount package incorporates matching networks optimized for output power, effciency, and linearity in a 50 ? system. 1 2 3 4 5 10 9 8 7 6 v bat t rf in v mode 2 v mode 1 v en cp l ou t gn d cp l in rf ou t v cc bias contro l voltage regulatio n cp l gnd at slug (pad ) 03/2012
2 figure 2: pinout (x-ray top view) table 1: pin description v bat t rf in v mode 2 v mode 1 v en 1 2 3 4 56 7 8 9 10 cp l ou t gn d cp l in rf ou t v cc 1 2 3 4 56 7 8 9 10 pin name description 1 v batt battery voltage 2 rf in rf input 3 v mode2 mode control voltage 2 4 v mode1 mode control voltage 1 5 v en pa enable voltage 6 cpl out coupler output 7 gnd ground 8 cpl in coupler input 9 rf out rf output 10 v cc supply voltage data sheet - rev 2.5 03/2012 ALT6705
3 electrical characteristics table 2: absolute minimum and maximum ratings stresses in excess of the absolute ratings may cause permanent damage. functional operation is not implied under these conditions. exposure to absolute ratings for extended periods of time may adversely affect reliability. table 3: operating ranges the device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defned in the electrical specifcations. parameter min max unit supply voltage (v cc ) 0 +5 v battery voltage (v batt ) 0 +6 v control voltages (v mode1 , v mode2 , v en ) 0 +3.5 v rf input power (p in ) - +10 dbm storage temperature (t stg ) -40 +150 c notes: (1) for operation at 3.1 v, p out is derated by 0.8 db. (2) lte waveform characteristics: up to 15 mhz, qpsk, rb = 16. (3) for operation at +105 c, p out is derated by 1.0 db. parameter min typ max unit comments operating frequency (f) 814 - 849 mhz supply voltage (v cc ) +3.1 +3.4 +4.35 v p out +28.4 dbm enable voltage (v en ) +1.35 0 +1.8 - +3.1 +0.5 v pa on pa shut down mode control voltage (v mode1, v mode2 ) +1.35 0 +1.8 - +3.1 +0.5 v low bias mode high bias mode wcdma/umts output power (1, 3) r99, hpm hspa (mpr = 0), hpm lte (2) (mpr = 0), hpm r99, mpm lte (2) & hspa (mpr = 0), mpm r99, lpm lte (2) & hspa (mpr = 0), lpm 27.6 26.6 26.4 - - - - 28.4 27.4 27.2 17.0 16.0 8.0 7.0 - - - - - - - dbm 3gpp ts 34.121-1, rel 8 table c.11.1.3 for wcdma subtest 1 ts 36.101 rel 8 for lte cdma output power (1, 3) hpm mpm lpm 26.9 - - 27.7 16.0 7.0 - - - dbm cdma 2000, rc1 case temperature (t c ) -40 - +90 8c data sheet - rev 2.5 03/2012 ALT6705
4 notes: (1) aclr and effciency measured at 832 mhz. table 4: electrical specifcations - lte operation (rb = 12, start = 0, qpsk) (t c = +25 c, v batt = v cc = +3.4 v, v en = +1.8 v, 50 ? system) parameter min typ max unit comments p out v mode1 v mode2 gain 26 16 10 29 19 13.5 32 22 16 db p out = +27.2 dbm p out = +16 dbm p out = +7 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr e-utra at 10 mhz offset - - - -41 -40 -40 -35 -35 -35 dbc p out = +27.2 dbm p out = +16 dbm p out = +7 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr utra at 7.5 mhz offset - - - -40 -39 -40 -36 -36 -36 dbc p out = +27.2 dbm p out = +16 dbm p out = +7 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr utra at 12.5 mhz offset - - - -60 -58 -57 -40 -40 -40 dbc p out = +27.2 dbm p out = +16 dbm p out = +7 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v power-added efficiency (1) 31 20 14 36 24 18 - - - % p out = +27.2 dbm p out = +16 dbm p out = +7 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v quiescent current (icq) low bias mode - 3 4.0 ma through v cc pin 1.8 v 1.8 v mode control current - 0.06 0.15 ma through v mode pins, v mode = 1.8 v enable current - 0.04 0.12 ma through v en pin batt current - 0.7 1.2 ma through v batt pin, v mode1 = +1.8 v, v mode2 = +1.8 v leakage current - <5 10 e a v batt = +4.35 v, v cc = +4.35 v, v en =0 v, v mode = 0 v, v mode1 = 0 v noise in receive band - -134 - dbm/hz 869 mhz to 894 mhz harmonic 2fo 3fo, 4fo - - -48 -60 -35 -42 dbc p out 6 27.2 dbm coupling factor - 20 - db directivity - 20 - db coupler in_out daisy chain insertion loss - <0.3 - db 698 mhz to 2620 mhz pin 8 - 6, shutdown mode spurious output level (all spurious outputs) - - <-70 dbc p o u t < +27.2 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over all operating conditions data sheet - rev 2.5 03/2012 ALT6705
5 table 5: electrical specifcations - wcdma operation (r99 modulation) (t c = +25 c, v cc = +3.4 v, v batt = +3.4 v, v en = +1.8 v, 50 ? system) notes: (1) aclr and effciency measured at 832 mhz. parameter min typ max unit comments p out v mode1 v mode2 gain 26 16 10 29 19 13.5 32 22 16 db p out = +28.4 dbm p out = +17 dbm p out = +8 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr1 at 5 mhz offset (1) - - - -41 -42 -40 -37 -37 -37 dbc p out = +28.4 dbm p out = +17 dbm p out = +8 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr2 at 10 mhz offset - - - -57 -58 -59 -48 -48 -48 dbc p out = +28.4 dbm p out = +17 dbm p out = +8 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v power-added efficiency (1) 36 23 - 16 - 40 27 18 20 11 - - - - - % p out = +28.4 dbm p out = +17 dbm p out = +13.5 dbm p out = +8 dbm p out = +3.5 dbm 0 v 1.8 v 1.8 v 1.8 v 1.8 v 0 v 0 v 0 v 1.8 v 1.8 v spurious output level (all spurious outputs) - - -70 dbc p out < +28.4 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over full operating range data sheet - rev 2.5 03/2012 ALT6705
6 table 6: electrical specifcations - cdma2000 operation (rc-1 waveform) (t c = +25 c, v batt = v cc = +3.4 v, v enable = +1.8 v, 50 ? system) notes: (1) aclr and effciency measured at 832 mhz. pa ra me te r mi n ty p ma x uni t co mments p ou t v mo de 1 v mo de 2 ga in 26 16 10 29 19 13 .5 32 22 16 db p ou t = +2 7. 7 db m p ou t = +1 6 db m p ou t = +7 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ad ja ce nt ch a nne l po we r at 885 kh z o ffs et (1 ) pr im ar y ch an ne l bw = 1. 23 mh z ad ja ce nt ch a nne l bw = 30 kh z - - - -5 0 -5 0 -5 0 -4 6. 5 -4 6. 5 -4 6. 5 db c p ou t = +2 7. 7 db m p ou t = +1 6 db m p ou t = +7 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ad ja ce nt ch a nne l po we r at 1. 98 mh z o ffs et (1 ) pr im ar y ch an ne l bw = 1. 23 mh z ad ja ce nt ch a nne l bw = 30 kh z - - - -5 9 -6 0 -6 0 -5 6 -5 6 -5 6 db c p ou t = +2 7. 7 db m p ou t = +1 6 db m p ou t = +7 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v po we r-a dded e ffi ci en cy (1 ) 33 20 13 37 23 17 - - - % p ou t = +2 7. 7 db m p ou t = +1 6 db m p ou t = +7 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v sp ur io us ou tp ut leve l (a ll sp ur io us ou tp ut s) -- -7 0d bc p ou t < + 27. 7 db m in -b an d load vswr < 5: 1 ou t- of -b an d load vswr < 10 :1 ap pl ie s ov er a ll oper at in g co nd it io ns load mi sm at ch st re ss wi th no per ma ne nt degr adat io n or fa il ur e 8: 1- - vsw ra ppli es ov er a ll oper at in g co nd it io ns data sheet - rev 2.5 03/2012 ALT6705
7 application information table 7: bias control figure 3: evaluation board schematic to ensure proper performance, refer to all related application notes on the anadigics web site: http://www.anadigics.com shutdown mode the power amplifer may be placed in a shutdown mode by applying logic low levels (see operating ranges table) to the v en , v mode1 and v mode2 voltages. bias modes the power amplifer may be placed in either low, medium or high bias modes by applying the appropriate logic level (see operating ranges table) to the v mode voltages. the bias control table below lists the recommended modes of operation for various applications. three operating modes are recommended to optimize current consumption. high bias/high power operating mode is for p out levels > 17 dbm. at ~17dbm - 8 dbm, the pa should be mode switched to medium power mode. for p out levels < ~7 dbm, the pa can be switched to low power mode for even lower quiescent current consumption. c3 330 pf c4 2.2 f ceramic rf in 1 6 7 10 8 5 4 3 v batt v mode1 rf out rf in gnd v cc v en cpl out v cc c1 0.01 f v batt v mode 1 v en cpl in v mode 2 29 v mode2 c5 2.2 f c2 0.01 f gnd at slug cpl in cpl out rf out c9 100 pf application p out levels bias mode v en v mode1 v mode2 v cc v b at t low power (low bias mode) ? +7 dbm low +1.8 v +1.8 v +1.8 v 3.1 - 4.35 v > 3.1 v med power (medium bias mode) > 7 dbm ? +17 dbm low +1.8 v +1.8 v 0 v 3.1 - 4.35 v > 3.1 v high power (high bias mode) > +17 dbm high +1.8 v 0 v 0 v 3.1 - 4.35 v > 3.1 v shutdown - shutdown 0 v 0 v 0 v 3.1 - 4.35 v > 3.1 v data sheet - rev 2.5 03/2012 ALT6705
8 figure 5: lte gain (db) over voltage (t c = 25 8c) 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 gain (db) pout (dbm) figure 5: lte gain (db) over voltage (tc=25c) 25c 3.2vcc 25c 3.4vcc 25c 4.2vcc figure 6: lte pae (%) over temperature (v batt = v cc = 3.4 v) 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 gain (db) pout (dbm) figure 4: lte gain (db) over temperature (vbatt=vcc=3.4v) - 30c 3.4vcc 25c 3.4vcc 90c 3.4vcc figure 4: lte gain (db) over temperature (v batt = v cc = 3.4 v) 0 5 10 15 20 25 30 35 40 45 50 0 5 10 15 20 25 30 efficiency (%) pout (dbm) figure 6: lte pae (%) over temperature (vbatt=vcc=3.4v) - 30 3.4cc 25c 3.4vcc 90c 3.4vcc figure 7: lte pae (%) over voltage (t c = 25 8c) 0 10 20 30 40 50 60 0 5 10 15 20 25 30 efficiency pout (dbm) figure 7: lte pae (%) over voltage (tc=25c) 25c 3.2vcc 25c 3.4vcc 25c 4.2vcc figure 8: lte aclr1 (dbc) over temperature (v batt = v cc = 3.4 v) -70 -65 -60 -55 -50 -45 -40 -35 0 5 10 15 20 25 30 aclr1 (5mhz dbc) pout (dbm) figure 8: lte acrl1 (dbc) over temperature (vbatt=vcc=3.4v) - 30c 3.4vcc 25c 3.4vcc 90c 3.4vcc figure 9: lte aclr1 (dbc) over voltage (t c = 25 8c) - 65 - 60 - 55 - 50 - 45 - 40 - 35 0 5 10 15 20 25 30 aclr1 (5mhz dbc) pout (dbm) figure 9: lte aclr1 (dbc) over voltage (tc=25c) 25c 3.2vcc 25c 3.4vcc 25c 4.2vcc performance data plots: data sheet - rev 2.5 03/2012 ALT6705
9 figure 10: m45 package outline - 10 pin 3 mm x 3 mm x 1 mm surface mount module figure 11: branding specifcation - m45 package package outline 6705r llllnn yy wwc c pin 1 identifier co untr y co de(c c) pa rt number date co de (y yw w) lo t number data sheet - rev 2.5 03/2012 ALT6705
10 pcb and stencil design guideline figure 12: recommended pcb layout information data sheet - rev 2.5 03/2012 ALT6705
11 component packaging figure 13: carrier tape pin 1 figure 14: reel data sheet - rev 2.5 03/2012 ALT6705
12 ordering information or der nu mb er te mp er at ure ra ng e pa ckag e descri pt ion co mp on ent pa ckagin g al t 6705r m4 5q 7- 40 o c to + 90 o c ro hs co mp li an t 10 pi n 3 mm x 3 mm x 1 mm su rf ace mo unt mo du le t ape an d re el , 2500 pi eces per re el al t 6705r m4 5p 9- 40 o c to + 90 o c ro hs co mp li an t 10 pi n 3 mm x 3 mm x 1 mm su rf ace mo unt mo du le pa rt ia l t ape an d re el warning anadigics products are not intended for use in life support appliances, devices or systems. use of an anadigics product in any such application without written consent is prohibited. import ant notice anadigics 141 mount bethel road warren, new jersey 07059, u.s.a. tel: +1 (908) 668-5000 fax: +1 (908) 668-5132 url: http://www.anadigics.com anadigics, inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. the product specifcations contained in advanced product information sheets and preliminary data sheets are subject to change prior to a products formal introduction. information in data sheets have been carefully checked and are assumed to be reliable; however, anadigics assumes no responsibilities for inaccuracies. anadigics strongly urges customers to verify that the information they are using is current before placing orders. data sheet - rev 2.5 03/2012 ALT6705


▲Up To Search▲   

 
Price & Availability of ALT6705

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X